Design Platform News
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sureCore-Led CryoCMOS IP: Toward Scalable Quantum Computers
(Wednesday, August 23, 2023)
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Creonic Engages in Numerous Research Projects within the 6G Platform
(Wednesday, August 16, 2023)
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Marvell Introduces Industry's First 5nm Multi-Gigabit PHY Platform
(Wednesday, August 16, 2023)
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Faraday Announces Infineon's SONOS eFlash is Fully Qualified on UMC's 40ULP Process
(Wednesday, August 16, 2023)
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Sirius Wireless Partners with S2C on Wi-Fi6/BT RF IP Verification System for Finer Chip Design
(Wednesday, August 16, 2023)
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Certus Semiconductor Partners with Pragma Design for Embedded ESD Detection Technology
(Tuesday, August 15, 2023)
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CEVA Joins Samsung SAFE™ Foundry Program to Accelerate Chip Design for the Mobile, Consumer, Automotive, Wireless Infrastructure and IoT Markets
(Sunday, August 13, 2023)
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Analog IP tackles side channel attacks
(Monday, August 7, 2023)
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UCIe™ (Universal Chiplet Interconnect Express™) Consortium Releases its 1.1 Specification
(Monday, August 7, 2023)
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Unlock seamless video transmission between graphics adapters and LCD displays with readily licensable, silicon-proven LVDS IP cores tailored for the advanced 22FDX process node
(Sunday, August 6, 2023)
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DVB-C Demodulator IP Core Available For Immediate Implementation From Global IP Core
(Sunday, August 6, 2023)
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JEDEC Publishes New Standard to Support CXL Memory Module Implementation
(Tuesday, August 1, 2023)
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Renesas adopts Visual Studio IDE across entire range
(Monday, July 31, 2023)
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Arm and industry leaders launch Semiconductor Education Alliance to address the skills shortage
(Tuesday, July 25, 2023)
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Mobiveil and InPsytech Announce Successful Inter-Op Verification of Enterprise Flash Controller Design IP and ONFI 5.1 PHY IP
(Monday, July 24, 2023)
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A methodology for turning an SoC into chiplets
(Monday, July 24, 2023)
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12bit 640Msps Dual-Channel IQ ADC High-Speed/High-Performance IP Cores for WiFi RF SoC is available for immediate licensing
(Sunday, July 23, 2023)
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Cadence RTL design tool claims 5x faster RTL convergence
(Sunday, July 23, 2023)
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The revolutionary potential of 3D IC technology in the semiconductor ecosystem
(Thursday, July 20, 2023)
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Synopsys Accelerates Advanced Chip Design with First-Pass Silicon Success of IP Portfolio on TSMC 3nm Process
(Wednesday, July 19, 2023)
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Lightelligence Partners With ZeroPoint Technologies to Increase Data Center Connectivity Performance by Up to 50%
(Tuesday, July 18, 2023)
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Minimize Design Risk and Achieve First-Pass Silicon Success on TSMC's N3E Process
(Tuesday, July 18, 2023)
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Cadence Unveils Joules RTL Design Studio, Delivering Breakthrough Gains in RTL Productivity and Quality of Results
(Sunday, July 16, 2023)
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Cadence Joules RTL Design Studio delivers breakthrough gains
(Sunday, July 16, 2023)
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Truechip Announces First Customer Shipment Of USB4v2 Verification IP
(Wednesday, July 12, 2023)
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Global Semiconductor Equipment Sales Forecast: $87 Billion in 2023 With 2024 Rebound, SEMI Reports
(Wednesday, July 12, 2023)
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Siemens' Calibre platform now certified for IFS' Intel 16 process technology
(Monday, July 10, 2023)
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Synopsys Delivers Certified EDA Flows and High-Quality IP for Intel 16 Process
(Monday, July 10, 2023)
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Faraday's Launched SerDes Advanced Service to Accelerate ASICs into Production
(Monday, July 10, 2023)
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Xpeedic Launches High-Speed Digital Signal Integrity, Power Integrity Suite at Design Automation Conference
(Sunday, July 9, 2023)
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Siemens unveils Calibre DesignEnhancer for Calibre correct-by-construction IC layout optimization
(Sunday, July 9, 2023)
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imec looks to process flow for sub-nm stacked CFET transistors
(Tuesday, July 4, 2023)
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proteanTecs to Showcase the Future of Health and Performance Monitoring at DAC and SEMICON West 2023
(Tuesday, July 4, 2023)
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Single Carrier Modem Available For Immediate Licensing From Global IP Core
(Sunday, July 2, 2023)
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Synopsys and Golden Electronics Collaborate to Expand Chip Design Talent in Jordan
(Sunday, July 2, 2023)
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ADTechnology Joins Synopsys IP OEM Partner Program
(Sunday, July 2, 2023)
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CAST Introduces New MACsec Protocol Engine IP Cores
(Thursday, June 29, 2023)
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Ansys and Synopsys Accelerate RFIC Semiconductor Design with New Reference Flow for Samsung Technology
(Wednesday, June 28, 2023)
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Intel and Movellus Develop Different Fixes For IC Voltage Droop
(Wednesday, June 28, 2023)
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Weebit Nano's ReRAM IP now fully qualified in SkyWater Technology's S130 process
(Wednesday, June 28, 2023)
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OKI IDS adopts Siemens Catapult High-Level Synthesis platform for design and verification services
(Wednesday, June 28, 2023)
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DCAN FD Full - a final step to CAN XL?
(Tuesday, June 27, 2023)
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Cadence Digital and Custom/Analog Design Flows Certified for Samsung Foundry's SF2 and SF3 Process Technologies
(Tuesday, June 27, 2023)
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Cadence Delivers Certified, Innovative Backside Implementation Flow to Support Samsung Foundry SF2 Technology
(Tuesday, June 27, 2023)
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Arasan furthers the compliance of their I3C IP with its participation in the I3C Interop at MIPI Member Meeting
(Monday, June 26, 2023)
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Comcores Unveils JESD204 IP Core Integration Guide to Streamline Customer PHY Integration Challenges
(Monday, June 26, 2023)
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Cadence AI-Based Virtuoso Studio Certified for Samsung Foundry PDKs for Mature and Advanced Nodes
(Monday, June 26, 2023)
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With NextGen, CEA is inventing the future generations of electronic chips to maintain France's competitiveness
(Monday, June 26, 2023)
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DB GlobalChip Deploys Cadence's Spectre FX and AMS Designer, Accelerating IP Verification by 2X
(Sunday, June 25, 2023)
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12Bit ADC and DAC IP Cores with High-Speed, High-Performance for Wireless applications that requires RF are available for immediate licensing
(Sunday, June 25, 2023)
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