Design Platform News
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Tessolve Joins GlobalFoundries' Design Enablement Network Program as a Design Partner to Bring Advanced Design Solutions to Accelerate Customer Product Development
(Tuesday, November 2, 2021)
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Silicon Creations Named 2021 TSMC Partner of the Year for Analog / Mixed-Signal IP
(Tuesday, November 2, 2021)
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proteanTecs UCT Supports TSMC 3nm Process Technology to Accelerate Lifecycle Health Monitoring
(Tuesday, November 2, 2021)
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Siemens Collaborates with TSMC on Design Tool Certifications for Advanced Technologies
(Sunday, October 31, 2021)
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Siemens collaborates with TSMC on design tool certifications for TSMC's advanced technologies and other industry milestones
(Tuesday, October 26, 2021)
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Cadence Integrity 3D-IC Platform Supports TSMC 3DFabric Technologies for Advanced Multi-Chiplet Designs
(Tuesday, October 26, 2021)
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JEDEC Publishes Update to DDR5 SDRAM Standard Used in High-Performance Computing Applications
(Tuesday, October 26, 2021)
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Siemens collaborates with TSMC on design tool certifications
(Tuesday, October 26, 2021)
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SD 5.1/eMMC 5.1 Host and Device Controllers with Matching PHYs for all kind of Portable Memory Storage Devices, making it easy to integrate a wide range of Applications in your products
(Tuesday, October 26, 2021)
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Analog Bits to Present Papers, Demo of N5 Working Silicon, and Roadmap on IPs for TSMC N4 and N3 Processes
(Monday, October 25, 2021)
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QuickLogic Announces First eFPGA IP From Australis IP Generator on UMC 22nm Process
(Monday, October 25, 2021)
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Agile Analog broadens analogue IP portfolio
(Monday, October 25, 2021)
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Siemens accelerates IP validation by 1,000X at Arm using ML-powered Solido Variation Designer on AWS Graviton2
(Wednesday, October 20, 2021)
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Cadence Digital and Custom/Analog Flows Achieve the Latest TSMC N3 and N4 Certifications
(Wednesday, October 20, 2021)
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Synopsys Expands Strategic Technology Collaboration with TSMC to Extend 3D-System Integration Solutions for Next-Generation High-Performance Computing Designs
(Tuesday, October 19, 2021)
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Synopsys Digital and Custom Design Platforms Achieve Certification for TSMC N3 Process
(Tuesday, October 19, 2021)
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Imperas Models for Arm Processors now available in TESSY by Razorcat
(Sunday, October 17, 2021)
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MosChip Announces Multi-Protocol Long Range 8G SerDes PHY in 28nm
(Monday, October 11, 2021)
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Thalia's IP reuse platform joins Cadence Connections EDA Program
(Sunday, October 10, 2021)
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Marvell Extends Data Infrastructure Leadership with TSMC 3nm Platform
(Tuesday, October 5, 2021)
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Siemens introduces mPower power integrity solution for analog, digital and mixed-signal IC designs
(Monday, September 27, 2021)
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Synopsys Achieves AIM Photonics Certification
(Sunday, September 26, 2021)
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SiPearl opens design centre in Grenoble, looks for 50 engineers
(Sunday, September 26, 2021)
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Cadence Accelerates Development of Mobile, Automotive and Hyperscale Systems with the Helium Virtual and Hybrid Studio
(Wednesday, September 22, 2021)
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Samsung Foundry Certifies Synopsys PrimeLib Unified Library Characterization and Validation Solution at 5nm, 4nm and 3nm Process Nodes
(Tuesday, September 21, 2021)
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Codasip Opens UK Design Center led by Simon Bewick
(Monday, September 20, 2021)
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Cadence Collaborates with GlobalFoundries to Qualify Pegasus Verification System for 12LP/12LP+ and 22FDX™ Technologies
(Tuesday, September 14, 2021)
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Siemens' Aprisa place-and-route solution now certified for GlobalFoundries' 22FDX platform
(Tuesday, September 14, 2021)
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SmartDV Provides Broad Portfolio of Memory Modeling, Design and Verification Solutions
(Monday, September 13, 2021)
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Synopsys PrimeSim Reliability Analysis Solution Accelerates Design of Hyper-Convergent ICs for Mission-Critical Applications
(Sunday, September 12, 2021)
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EnSilica opens new design centre, starts recruitment drive
(Tuesday, September 7, 2021)
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Cadence and Samsung Accelerate 3nm Mixed-Signal Silicon
(Tuesday, September 7, 2021)
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VisualSim Cloud brings popular System-Level Modeling Solution to the Browser
(Monday, September 6, 2021)
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EPFL launches quantum computing and technology centre
(Monday, August 30, 2021)
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Photonic Chips for Fault-Tolerance Quantum Computing
(Monday, August 30, 2021)
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eTopus Selects Diakopto's ParagonX Platform for Ultra-High Speed SerDes IP
(Monday, August 23, 2021)
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Synopsys Enables First-Pass Silicon Success for Achronix's New FPGA for Data and AI Acceleration Applications
(Monday, August 23, 2021)
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Quantum Computing Technologies Highlight CMC Microsystems' Plan to Accelerate High Tech Manufacturing in Canada
(Monday, August 23, 2021)
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Imec and Xanadu engage in SiN
(Tuesday, August 17, 2021)
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Picocom Accelerates 5G Communications SoC Development with Cadence Palladium Emulation
(Tuesday, August 17, 2021)
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Xpeedic EDA Cloud Platform on Microsoft Azure
(Monday, August 16, 2021)
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Rambus HBM subsystem more than doubles HBM2E speed
(Sunday, August 15, 2021)
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Sondrel creates unique modelling flow software to cut ASIC modelling time from months to a few days
(Monday, August 9, 2021)
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Semiconductor Industry 2.0
(Monday, August 9, 2021)
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Tessent boosts simultaneous analysis of hardware and software in SoC designs
(Thursday, July 22, 2021)
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Cadence and UMC Collaborate on 22ULP/ULL Reference Flow Certification for Advanced Consumer, 5G and Automotive Designs
(Monday, July 12, 2021)
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Corigine Delivers a Next-Generation Prototyping System for ASIC and Pre-Silicon Software Development
(Tuesday, July 6, 2021)
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Silicon Creations Selects Diakopto's ParagonX IC Debugging Platform
(Tuesday, June 29, 2021)
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AnalogX Accelerates Time-to-Market with Diakopto's ParagonX Debugging Platform and Methodology
(Tuesday, June 29, 2021)
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Dialog Semiconductor Expands AC/DC Portfolio, Targeting High Power Density PSUs with Zero Voltage Switching Technology
(Monday, June 28, 2021)
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