Design Platform News
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SmartDV Broadens Support for Arm AMBA Protocol with Verification IP Solutions for AMBA CHI, CXS, LPI
(Tuesday, July 7, 2020)
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JLQ Technology Selects Synopsys DesignWare IP to Accelerate Development of Next-Generation SoCs
(Monday, July 6, 2020)
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Synopsys and Arm Extend Strategic Partnership to Deliver Superior Full-Flow Quality-of-Results and Time-to-Results
(Sunday, June 28, 2020)
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Synopsys Collaboration with Samsung Foundry Enables Rollout of Samsung SAFE Cloud Design Platform
(Wednesday, June 17, 2020)
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Samsung Provides One-Stop Foundry Design Environment with the Launch of 'SAFE™ Cloud Design Platform'
(Tuesday, June 16, 2020)
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Agile Analog and EnSilica Collaborate to Improve Quality and Reliability of Microchips
(Monday, June 15, 2020)
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Cadence Collaborates with TSMC and Microsoft to Reduce Semiconductor Design Timing Signoff Schedules with the Cloud
(Monday, June 15, 2020)
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Truechip Announces Shipping of Performance Analyzer Tool Kit to Aaroh Labs
(Wednesday, June 10, 2020)
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Moortec Launches New In-Chip Technology for Highly Distributed, Real-Time Thermal Analysis on TSMC N5 Process
(Tuesday, June 9, 2020)
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SmartDV's Design and Verification Solutions Portfolio Surpasses 600 Offerings
(Monday, June 8, 2020)
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Cadence Achieves Digital and Custom/Analog EDA Flow Certification for TSMC N6 and N5 Process Technologies
(Tuesday, June 2, 2020)
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GigaDevice GD32 MCU and Amazon AWS Launch New Embedded Cloud Platform
(Monday, June 1, 2020)
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UltraSoC enables ultra-high-speed closed-chassis analytics and debug over Synopsys USB3
(Monday, June 1, 2020)
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Cadence to Optimize Digital Full Flow and Verification Suite for Arm Cortex-A78 and Cortex-X1 CPU Mobile Device Development
(Tuesday, May 26, 2020)
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Synopsys Announces Support of TensorFlow Lite for Microcontrollers on Energy-Efficient ARC EM and ARC HS Processor IP
(Tuesday, May 26, 2020)
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Synopsys Enables Tapeout Success for Early Adopters of Arm's Next Generation of Mobile IP
(Monday, May 25, 2020)
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S2C Announces New Prodigy Cloud System for Next Generation SoC Prototyping
(Wednesday, May 20, 2020)
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Cadence Delivers 10 New Verification IP Targeting Automotive, Hyperscale Data Center and Mobile Applications
(Monday, May 18, 2020)
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SmartDV Ships First Design and Verification IP for MIPI RFFE v3.0 Specification
(Monday, May 11, 2020)
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Faraday's SoCreative!V Platform Accelerates SoC Development in Edge Applications
(Monday, May 4, 2020)
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Dolphin Design unveils its innovative Energy Efficient Platforms, complete turnkey solutions for competitive SoC designs
(Sunday, May 3, 2020)
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Synopsys Introduces 3DIC Compiler, Industry's First Unified Platform to Accelerate Multi-die System Design and Integration
(Monday, April 27, 2020)
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Khronos Group Releases OpenCL 3.0
(Monday, April 27, 2020)
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Mirabilis Design is making the standard training class on Model-based System Simulation and Electronic System-Level Design for free
(Monday, April 6, 2020)
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Veriest International On-line Verification Meetup
(Monday, March 30, 2020)
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SiFive Selects Synopsys Fusion Design Platform and Verification Continuum Platform to Enable Rapid SoC Design
(Tuesday, March 24, 2020)
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InterMotion Technology boosts IP verification productivity for Lattice Semiconductor's CrossLink FPGA family using Aldec's Active-HDL
(Monday, March 23, 2020)
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SiFive Launches Advanced Trace and Debug Portfolio, SiFive Insight
(Monday, March 16, 2020)
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Cadence Digital Full Flow Optimized to Deliver Improved Quality of Results with Up to 3X Faster Throughput
(Monday, March 16, 2020)
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Faraday Delivers System-Level ESD Protection Service to Reduce ASIC Time-to-Market
(Monday, March 16, 2020)
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Synopsys Unveils RTL Architect To Accelerate Design Closure
(Sunday, March 15, 2020)
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Synopsys Custom Design Platform Secures Full-flow Displacement of Legacy Design Tools at Alphawave
(Monday, March 9, 2020)
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UMC certifies Mentor product lines for its new 22nm ultra-low-power process technology
(Wednesday, March 4, 2020)
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Faraday Announces Low-DPPM Solution for a Wide Range of ASIC Applications
(Wednesday, March 4, 2020)
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Veriest contributes to the verification of Nuvoton's Computing MCU devices
(Tuesday, March 3, 2020)
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Defacto Announces STAR 8.0 and Provides a Unified "All-in-One" SoC Design Solution to Help Conciliating Between RTL, IP-XACT, UPF, SDC, and Physical Design Information
(Tuesday, March 3, 2020)
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Gowin Semiconductor Adds Ubuntu Support to their Gowin EDA FPGA Software for Improved Artificial Intelligence and IoT Development Toolchain Integration
(Wednesday, February 19, 2020)
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Synopsys' Fusion Compiler Adopted by AMD
(Tuesday, February 18, 2020)
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SmartDV Offers New Design IP for DDR5 and LPDDR5
(Monday, February 17, 2020)
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UltraSoC collaborates with PDF Solutions to prevent in-life product failures using end-to-end analytics and advanced machine learning techniques
(Wednesday, February 12, 2020)
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SmartDV Adds Support for MIPI I3C 1.1 Across Entire IP Portfolio
(Tuesday, February 11, 2020)
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SmartDV Achieves Record Revenue in 2019
(Monday, February 3, 2020)
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Imagination Technologies expands with new design centre in Romania
(Wednesday, January 15, 2020)
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Cadence Expands Collaboration with Broadcom for 5nm and 7nm Designs
(Monday, January 13, 2020)
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NEC Selects Synopsys ZeBu Server 4 Emulation Solution for Super Computer Verification
(Thursday, December 19, 2019)
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Codasip Studio and Codasip CodeSpace 8.2 available
(Sunday, December 15, 2019)
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NSITEXE Selects SmartDV TileLink Verification IP for RISC-V Based Applications
(Monday, December 9, 2019)
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INSPECTOR™ diagnostic and debug platform passed the PCIe 4.0 compliance
(Monday, December 9, 2019)
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SmartDV's TileLink, Verilator VIP on Full Display at RISC-V Summit
(Tuesday, December 3, 2019)
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D&R announces the opening of an IP Core Store to support Soft IP Cores sales to the Chinese market
(Monday, December 2, 2019)
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