RISC-V News
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Andes Technology and Spacetouch Collaborate to Unveil High-Tech Edge-Side AI Audio Processor Featuring the Powerful RISC-V AndesCore™ D25F
(Monday, January 8, 2024)
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The SHD Group Has Released a Complimentary Version of the 2024 RISC-V Market Analysis Report Containing Current Market Data and Future Projections
(Sunday, January 7, 2024)
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China Is All In on a RISC-V Future
(Sunday, January 7, 2024)
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Andes Announces General Availability of the New RISC-V Out-Of-Order Superscalar Multicore Processor, the AndesCore™ AX65
(Thursday, January 4, 2024)
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MIPS Inc. (San Jose, Calif.) has recruited Drew Barbier and Brad Burgess to its leadership team, both formerly with RISC-V pioneer SiFive Inc.
(Wednesday, January 3, 2024)
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MIPS recruits former senior SiFive execs to boost RISC-V play
(Wednesday, January 3, 2024)
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MIPS Welcomes New Executives as Part of Company's Growth and Expansion
(Tuesday, January 2, 2024)
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MIPS snags top SiFive brains to amp up RISC-V business
(Tuesday, January 2, 2024)
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3 trends for 2024: AI drives more edge intelligence, RISC-V, & chiplets
(Monday, January 1, 2024)
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Five Leading Semiconductor Industry Players Incorporate New Company, Quintauris, to Drive RISC-V Ecosystem Forward
(Thursday, December 21, 2023)
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BSC presents Sargantana, the new generation of the first open-source chips designed in Spain
(Thursday, December 14, 2023)
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GigaDevice partners with SEGGER on Embedded Studio for RISC-V
(Wednesday, December 13, 2023)
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Free development tools for Gigadevice RISC-V microcontrollers
(Tuesday, December 12, 2023)
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Andes Awards Imperas 2023 Partner of the Year
(Monday, December 11, 2023)
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Renesas Champions the RISC-V Cause With Its Own 32-bit RISC-V CPU
(Tuesday, December 5, 2023)
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Keeping It 100: RISC-V Reality Check
(Monday, December 4, 2023)
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Canonical joins the RISC-V Software Ecosystem (RISE)
(Sunday, December 3, 2023)
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Renesas Unveils the First Generation of Own 32-bit RISC-V CPU Core Ahead of Competition
(Wednesday, November 29, 2023)
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Amidst export restrictions, RISC-V continues to advance
(Tuesday, November 28, 2023)
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New RISC-V processors address demand for open source and performance
(Monday, November 20, 2023)
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Ventana Micro Systems Unveils Second Generation Veyron Family RISC-V Processor, Paving the Way for Data Center-Class Performance
(Sunday, November 19, 2023)
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Andes Technology Partners with WITTENSTEIN high integrity systems (WHIS) to Build Safety-Critical Solutions with RISC-V Processors
(Monday, November 13, 2023)
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RISC-V Pioneer SiFive Takes Stock, Realigns, Moves Forward
(Wednesday, November 8, 2023)
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RISC-V International Marks Banner Year for RISC-V Adoption, Technical Momentum, and Community Engagement
(Tuesday, November 7, 2023)
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China Deploys Massive RISC-V Server in Commercial Cloud
(Tuesday, November 7, 2023)
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Ventana and Imagination Partner to Deliver World's Highest Performance RISC-V CPU & GPU Solutions
(Tuesday, November 7, 2023)
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OpenHW Group Announces CORE-V CVA6 Platform Project for RISC-V Software Development & Testing
(Tuesday, November 7, 2023)
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Ventana Introduces Veyron V2 - World's Highest Performance Data Center-Class RISC-V Processor and Platform
(Tuesday, November 7, 2023)
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Ubilite Licenses RISC-V Application Processor IP Core from CAST
(Monday, November 6, 2023)
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Synopsys Expands Its ARC Processor IP Portfolio with New RISC-V Family
(Monday, November 6, 2023)
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Hyperion Core Joins RISC-V International as a Strategic Member
(Sunday, November 5, 2023)
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TASKING, Andes, and MachineWare Team Up to Facilitate Rapid Development of RISC-V ASIL Compliant Automotive Silicon
(Sunday, November 5, 2023)
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Ansys medini Accelerates Andes' Development of Automotive-Grade IP
(Thursday, November 2, 2023)
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Imperas RISC-V Solutions for Developers - Accelerating RISC-V
(Wednesday, November 1, 2023)
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Sophgo Licenses SiFive RISC-V Processor Cores to Drive High-Performance AI Computing Innovation
(Wednesday, November 1, 2023)
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Semidynamics and Arteris Partner To Accelerate AI RISC-V System-on-Chip Development
(Wednesday, November 1, 2023)
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Axiomise Heads to Silicon Valley Next Week for RISC-V Summit North America
(Tuesday, October 31, 2023)
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Tenstorrent Teams with Imperas to Provide Model of the Tenstorrent Ascalon RISC-V Core
(Monday, October 30, 2023)
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lowRISC Announces New OpenTitan Project Partner, zeroRISC
(Monday, October 30, 2023)
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Codasip delivers processor security to actively prevent the most common cyberattacks
(Monday, October 30, 2023)
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RISC-V Releases Abound Ahead of 2023 RISC-V Summit
(Friday, October 27, 2023)
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SiFive lays off 20% of staff, re-aligns business
(Tuesday, October 24, 2023)
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Semidynamics launches first fully-coherent RISC-V Tensor unit to supercharge AI applications
(Monday, October 23, 2023)
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Codasip's New RISC-V Processor Family Dials In on Custom Compute
(Monday, October 23, 2023)
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Andes Technology Unveils Andes D23 and N225 Cores Pioneering the Next Generation of Compact, Performant, and Secure RISC-V Processor Technology
(Tuesday, October 17, 2023)
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Qualcomm to Bring RISC-V Based Wearable Platform to Wear OS by Google
(Tuesday, October 17, 2023)
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Codasip announces next-generation RISC-V processor family for Custom Compute
(Monday, October 16, 2023)
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SiFive Announces Differentiated Solutions for Generative AI and ML Applications Leading RISC-V into a New Era of High-Performance Innovation
(Tuesday, October 10, 2023)
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RISC-V group says export ban on open-source chip standard would slow innovation
(Monday, October 9, 2023)
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Semidynamics and SignatureIP create a fully tested RISC-V multi-core environment and CHI interconnect
(Monday, October 2, 2023)
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