Chiplet / Multi-Die News
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Alphawave IP announces production availability of new PCIe-CXL solution on TSMC N5 process for storage and broader chiplet market
(Tuesday, October 12, 2021)
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Rambus Advances Server Memory Performance with the Industry's First 5600 MT/s DDR5 Registering Clock Driver
(Tuesday, October 12, 2021)
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Interlaken IP Core for high-speed chip-to-chip applications is now available
(Wednesday, October 6, 2021)
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Cadence Accelerates System Innovation with Breakthrough Integrity 3D-IC Platform
(Wednesday, October 6, 2021)
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Synopsys Accelerates Multi-Die Designs with Industry's First Complete HBM3 IP and Verification Solutions
(Wednesday, October 6, 2021)
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Rambus Delivers CXL 2.0 Controller with Industry-leading Zero-Latency IDE
(Tuesday, October 5, 2021)
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Chiplet Strategy is Key to Addressing Compute Density Challenges
(Tuesday, September 28, 2021)
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Amphenol ICC Develops 112Gb/s Interconnect Technology with eTopus Products for High Speed IP Solutions
(Tuesday, September 14, 2021)
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Arteris IP FlexNoC Interconnect Licensed for Use in SK Telecom SAPEON AI Chips
(Monday, September 6, 2021)
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GUC Announces Industry Highest Bandwidth and Power Efficient Die-to-Die (GLink 2.0) Total Solution
(Monday, August 30, 2021)
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Hirose and eTopus Technology Develop Combined 112Gbps Interconnect Solution for AI Training Applications
(Tuesday, August 17, 2021)
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