Silvaco is advancing the electronics industry with its most recent technological innovations. Leveraging its understanding of semiconductor technologies, the business has created the artificial intelligence-based Fab Technology Co-optimization (FTCO) solution by combining data analytics and machine learning. This platform aims to reduce fabrication cost, time, and prototyping of wafers in semiconductor manufacturing.
www.embedded.com, Sept. 25, 2024 –
Silvaco's new technology is expected to expedite the integration of fabrication processes by focusing on process development, reducing prototyping time, and enhancing yield. This advancement is expected to give wafer-level production facilities a significant benefit, thereby allowing them to adopt a more effective and simplified semiconductor manufacturing technique.
Chief Executive Officer and Director of Silvaco Group, Babak Taheri, underlined in an interview with Embedded that the growing complexity in chip design and production is causing several difficulties in the worldwide semiconductor sector. "The semiconductor industry is indeed facing increasing complexity on many fronts," Taheri added. "As a result, EDA vendors are able to focus on different complementary areas to accelerate design time/efficiency, and Silvaco is helping with manufacturing costs and time-to-market for advanced technologies."
Digital prototyping
Based on several highly specialized procedures combined with modern technology and superior monitoring, semiconductor chip manufacture is an exceedingly complicated process with some technologies over a thousand layers of processing. Several elements contribute to this increased complexity: the necessity to fit billions of transistors into an ever-tinier area, the continual shrinking of electrical devices, and, most importantly, the worldwide growing demand for chips. Inside sterile rooms, often referred to as clean rooms, semiconductor devices must be created with perfect accuracy at every level of manufacture to prevent particle contamination and employ very sophisticated lithographic processes to outline the circuits on a silicon wafer. Moreover, the shrinking of transistors imposes technological and physical restrictions, therefore complicating the whole production process. Accurate digital representations of every stage of wafer production enable the final performance to be optimized, therefore enhancing efficiency and lowering the time and expenses involved in the development of ever more powerful and small-sized chips.
Taheri said that Silvaco is tackling these difficulties by concentrating on the process development of advanced CMOS and compound semiconductors. Taheri observed, "We are accelerating fab process integration and yield enhancement using AI and Machine Learning via our Fab Technology Co-Optimization (FTCOTM) platform."
Apart from these initiatives, according to the speaker, Silvaco is also widening its IP portfolio to assist clients in enhancing their design time. Taheri remarked, "as a parallel effort, we are expanding our IP portfolio to help customers improve their design efficiencies."