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Browse Security
Content Protection Software (1)
Cryptography (252)
Cryptography Cores (53)
Cryptography Software Library (6)
DRM Solution (1)
Embedded Security Modules (28)
Ethernet Security (10)
Platform Security (12)
PUF Based (10)
Security IP (34)
Security Platform (31)
Security Protocol Accelerators (3)
Security Subsystems (21)
Other (33)
AES (21)
DES (2)
MD5 (2)
Public Key Accelerator (11)
Random Number Generator (3)
SHA (5)
SNOW 3G (1)
Other (8)
495 IP
151
10.0
True Random Number Generators
The security strength of many systems and applications is dependent on the quality of random number generators. Many cryptographic operations require ...
152
10.0
Secure Hash Algorithm 256 IP Core
A universal solution that effectively accelerates the SHA2-256 hash function conforming with FIPS PUB 180-4 is the SHA2-256 bridge to APB, AHB, and AX...
153
10.0
AES Encoder and Decoder
CYB-AES implements Rijndael cipher encoding and decoding in compliance with the NIST Advanced Encryption Standard. It supports all of the available ke...
154
10.0
128-bit Public Key Accelerator
Public key cryptography requires complex mathematical operations on very large numbers (from 160 to 4096 bits, or more). The majority of embedded CPUs...
155
10.0
32-bit Public Key Accelerator
Public key cryptography requires complex mathematical operations on very large numbers (from 160 to 4096 bits, or more). The majority of embedded CPUs...
156
10.0
Secure Boot Software Development Kit
Secure boot enhances the security of an embedded system by cryptographically verifying that the code being loaded and executed is authentic and has no...
157
10.0
Security Protocol Accelerator for SM3 and SM4
SM3 and SM4 are commercial cryptographic standards issued and regulated by the Chinese Office of State Commercial Cryptography Administration (OSCCA)...
158
10.0
True Random Number Generator for NIST SP 800-90c
The security strength of many systems and applications is dependent on the quality of random number generators. Many cryptographic operations require ...
159
10.0
tRoot Fx Hardware Secure Modules: Programmable Root of Trust
Synopsys tRoot™ Hardware Secure Modules (HSMs) with Root of Trust enable connected devices to securely and uniquely identify and authenticate themselv...
160
10.0
tRoot Vx Hardware Secure Modules
Synopsys IP tRoot™ Hardware Secure Modules (HSMs) with Root of Trust enable connected devices to securely and uniquely identify and authenticate thems...
161
10.0
Ultra High-Performance AES-GCM/CTR IP
The proliferation and expansion of connected devices, connectivity infrastructure, cloud computing, and artificial intelligence is driving for increas...
162
10.0
Ultra High Performance AES-XTS/ECB Core
The proliferation and expansion of connected devices, connectivity infrastructure, cloud computing, and artificial intelligence is driving for increas...
163
9.0
TRNG fully compliant with NIST 800-22
The eSi-TRNG is a high quality implementation of a True Random Number Generator fully compliant with latest NIST 800-22. The block uses a standard AM...
164
8.0
CRYSTALS Dilithium core for accelerating NIST FIPS 204 Module Lattice Digital Signature algorithm
eSi-Dilithium is a hardware core for accelerating the high-level operations specified in the NIST FIPS 204 standard. Dilithium is an integral part o...
165
8.0
CRYSTALS Kyber core for accelerating NIST FIPS 203 Key Encapsulation Mechanism
eSi-Kyber is a hardware accelerator core designed to accelerate post-quantum Key Encapsulation Mechanism (KEM) as defined by NIST FIPS 203. Kyber, a...
166
8.0
Secure-IC's Securyzr™ SM4-GCM Multi-Booster
The SM4-GCM Multi-Booster crypto engine is a scalable implementation of the SM4-GCM algorithm compliant with the standard GBT.32907-2016 published by ...
167
8.0
HASH Core, providing MD5, SHA1 and SHA256. Includes DMA and AXI Interface
This is a high performance, small footprint HASH IP Core. It supports three HASH algorithms: MD5, SHA1, SHA256. A S/G DMA engine keeps the core runni...
168
8.0
ZLIB compatible compression and decompession, with DMA and AXi interface
This is a high performance, small footprint ZLIB compatible IP Core. It features 3 DMA engines, AXI interconnect and separate clocks for AXI interface...
169
8.0
AES supporting ECB, CBC and XTS/XEX modes. Includes DMA and AXI interface.
This is a high performance, small footprint crypt/decrypt IP Core. It features up to 8 independent crypt engines. Three DMA engines make sure the cor...
170
8.0
Secure-IC's Securyzr™ SM4-GCM Multi-Booster
The SM4-GCM Multi-Booster crypto engine is a scalable implementation of the SM4-GCM algorithm compliant with the standard GBT.32907-2016 published by ...
171
7.0
MACsec 10G/25G
Comcores MACsec IP provides Ethernet Layer 2 Security for port authentication, data confidentiality and data integrity as standardized in IEEE 802.1AE...
172
7.0
AES IP Core
AES IP Core is a Secure Symmetric Block Cipher IP Core that has compliance with the Advanced Encryption Standard (AES) specification in "FIPS 197". Th...
173
7.0
AES GCM IP Core
AES GCM IP Core is a Secure Symmetric Block Cipher IP Core that has compliance with the Advanced Encryption Standard (AES) specification in "FIPS 197"...
174
7.0
DRBG IP Core
DRBG IP Cores perform deterministic random bit generation in compliance with the standards and guidelines defined in 'NIST SP 800-90A'. This standard ...
175
7.0
ECDSA IP Core
ECDSA IP Cores perform digital signature generation and verification in compliance with the Elliptic Curve Digital Signature Algorithm (ECDSA) specifi...
176
7.0
RSA IP Core
RSA IP Cores perform digital signature generation and verification in compliance with the RSA (Rivest-Shamir-Adleman) Digital Signature Algorithm spec...
177
7.0
RSA Keygen IP Core
RSA Keygen IP Cores perform key generation in compliance with the RSA Key Pair Generation specifications defined in 'FIPS 186'. This standard specifie...
178
7.0
SHA3 IP Core
SHA3 IP Cores perform cryptographic hashing in compliance with the SHA-3 (Secure Hash Algorithm 3) specifications defined in 'FIPS 202'. This standard...
179
7.0
TRNG IP Core
TRNG IP Cores perform true random number generation in compliance with the standards and guidelines defined in 'NIST SP 800-90B'. This standard specif...
180
7.0
KYBER IP Core
Kyber IP is a core designed for Kyber post-quantum Key Encapsulation Mechanism (KEM). It currently supports the Encapsulation and Decapsulation functi...
181
7.0
Dilithium IP Core
Dilithium IP Core is a post-quantum digital signature algorithm (DSA). It currently supports Sign and Verify functions, with key generation functional...
182
7.0
Falcon IP Core
Falcon IP Core is a post-quantum digital signature algorithm (DSA). It is currently under development. It is going to be compliant with Falcon specifi...
183
7.0
External NOR Flash Protection
PUFxip is the extension function available for PUFcc, extending the Hardware Root of Trust to protect critical assets in the NOR Flash. PUFxip can wid...
184
6.0
External NAND Flash Protection
PUFenc is the extension function available for PUFcc, extending the Hardware Root of Trust to protect critical assets in the NAND Flash. PUFenc can wi...
185
5.0
High Throughput Elliptic Curve Cryptography hardware acceleration Core
eSi-ECDSA-HT is a High Throughput (HT) Elliptic Curve Cryptography (ECC) hardware acceleration core, which supports EC Digital Signature Algorithm (EC...
186
5.0
256-bit SHA Cryptoprocessor Core
The SHA-256 encryption IP core is a fully compliant implementation of the Message Digest Algorithm SHA-256. It computes a 256-bit message digest for m...
187
5.0
Advanced Encryption Standard Module
The CC-AES-APB is a synthesisable Verilog model of a Advanced Encryption Standard module. The AES core can be efficiently implemented on FPGA and ASIC...
188
5.0
Advanced Encryption Standard Module
The CC-AES-AXI is a synthesisable Verilog model of a Advanced Encryption Standard module. The AES core can be efficiently implemented on FPGA and ASIC...
189
5.0
Elliptic Curve Digital Signature generation and verification
eSi-ECDSA is a hardware acceleration core for Elliptic Curve (EC) Digital Signature Algorithm modular arithmetic operations defined in IEEE1363 and ot...
190
5.0
Device Secure Debug
The Joint Test Action Group (JTAG) is the IEEE1149.1 Standard Test Access Port (TAP) and Boundary Scan Architecture. Giving a full access to the inte...
191
5.0
Attack resistant ECC hardware acceleration core
eSi-ECC is a hardware acceleration core for Elliptic Curve (EC) modular arithmetic operations, which are commonly performed within EC cryptographic pr...
192
5.0
AES-XTS Multi-Booster
The AES-XTS Multi-Booster crypto engine includes a generic & scalable implementation of the AES algorithm making the solution suitable for a wide rang...
193
5.0
Hash Crypto Engine
The Hash Crypto Engine is flexible and optimized hash IP core compliant with FIPS 180-3 (HASH functions), FIPS 198 (HMAC function) and OSCCA (SM3). ...
194
5.0
KASUMI Crypto Engine
The KASUMI IP core is 3GPP confidentiality and integrity algorithms (UEA1/UIA1) stream cipher for telecommunication applications, requiring high perfo...
195
5.0
SNOW3G Crypto Engine
The SNOW3G IP core is 3GPP confidentiality and integrity algorithms (UEA2/UIA2) stream cipher for telecommunication applications, requiring high perfo...
196
5.0
ZUC Crypto Engine
The ZUC IP core is 3GPP confidentiality and integrity algorithms (EEA3/EIA3) stream cipher for telecommunication applications, requiring high performa...
197
5.0
Cryptographic library for Elliptic Curve Diffie–Hellman (ECDH) and Elliptic Curve Digital Signature Algorithm (ECDSA)
The Software ECC is a cryptographic library providing the main ECDSA and ECDH functionalities: - ECDSA key generation; - ECDSA signature and verificat...
198
5.0
Cryptographic library for encryption and decryption of Advanced Encryption Standard (AES) in ECB, CBC, OFB, CTR and GCM modes
The Software AES is a cryptographic library encrypting and decrypting 128-bit data blocks through a secure AES algorithm. The AES key length can be ch...
199
5.0
Hardened 128-bit Advanced Encryption Standard (AES) coprocessor
The AES Coprocessor encrypts and decrypts 128-bit data blocks by computing an AES algorithm with a 128, 192 or 256-bit key through a highly secure arc...
200
5.0
Hardware accelerator for RSA, DSA, Diffie-Hellman, El-Gamal and Elliptic Curves algorithms
The Public Key Cryptographic Coprocessor (PK2C) is a hardware accelerator intended to speed-up the core functions of public-key cryptography algorithm...
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