RISC-V News
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Ashling RiscFree now supports Andes Technology RISC-V CPUs
(Sunday, December 5, 2021)
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Imperas releases new RISC-V verification product that changes the fabric of processor DV
(Sunday, December 5, 2021)
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Imagination launches RISC-V CPU family
(Sunday, December 5, 2021)
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Fraunhofer extends RISC-V embedded processor for edge AI
(Sunday, December 5, 2021)
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HPMicro Semiconductor Announces the Release of the HPM6000 series of Microcontrollers with AndesCore™ dual D45 cores
(Wednesday, December 1, 2021)
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Andes RISC-V Superscalar Multicore A(X)45MP and Vector Processor NX27V Upgrade Their Spec. and Performance
(Wednesday, December 1, 2021)
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RISC-V International Ratifies 15 New Specifications, Opening Up New Possibilities for RISC-V Designs
(Wednesday, December 1, 2021)
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SiFive Raises RISC-V performance bar with New Best-in-Class SiFive Performance P650 Processor
(Wednesday, December 1, 2021)
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HPMicro Semiconductor Announces the Release of the HPM6000 Series of Microcontrollers with AndesCore Dual D45 Cores
(Wednesday, December 1, 2021)
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MIPS selects Imperas Reference Models for RISC-V Processor Verification
(Monday, November 29, 2021)
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IAR Systems and Codasip collaborate to enable low-power RISC-V based applications
(Monday, November 29, 2021)
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First RISC-V smartphones could launch in 2022
(Thursday, November 25, 2021)
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AMIQ EDA Joins OpenHW Group and Contributes Linting Capabilities for CORE-V Open-Source RISC-V Cores and Testbenches
(Wednesday, November 24, 2021)
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Microchip Adds Second Development Tool Offering for Designers Using Its Low-Power PolarFire RISC-V SoC FPGA for Embedded Vision Applications at the Edge
(Monday, November 22, 2021)
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Codasip Adopts Imperas for RISC-V Processor Verification
(Sunday, November 21, 2021)
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Imperas Models - reference for the newly ratified RISC-V Specifications
(Wednesday, November 17, 2021)
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Reference models for newly ratified RISC-V Specifications
(Wednesday, November 17, 2021)
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RISC-V Low-Power Embedded Processor IP Core Now Available from CAST
(Tuesday, November 16, 2021)
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NSITEXE DR1000C, a RISC-V based parallel processor IP with vector extension (DFP: Data Flow Processor) has been licensed for Renesas' new RH850/U2B Automotive MCUs
(Monday, November 8, 2021)
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Kneron Edge AI SoC Powered by Andes RISC-V Processor Core D25F
(Monday, November 8, 2021)
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Codasip expands ecosystem with XtremeEDA
(Wednesday, November 3, 2021)
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Codasip appoints Brett Cline to drive company growth worldwide
(Monday, November 1, 2021)
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Truechip Introduces Silicon IP For Network on Chip (NoC) Focussed For Tilelink RISC-V Chips
(Thursday, October 28, 2021)
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SiFive has briefly pulled back the curtains on its most powerful Risc-V processor yet.
(Wednesday, October 27, 2021)
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Codasip Founder Karel Masarik elected to RISC-V Technical Steering Committee
(Wednesday, October 27, 2021)
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Codasip boosts Studio processor design tools with AXI automation
(Monday, October 25, 2021)
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Codasip boosts custom RISC-V performance in latest tool
(Monday, October 25, 2021)
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New Allwinner RISC-V Chip Uncovered on Tiny Board
(Monday, October 25, 2021)
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IAR Systems extends functional safety offering for RISC-V with leading build tools for Linux
(Sunday, October 24, 2021)
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Functional safety tools certified on RISC-V
(Sunday, October 24, 2021)
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De-RISC, the H2020 project which will create the first RISC-V fully European platform for aerospace, celebrates its second anniversary
(Tuesday, October 19, 2021)
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RISC-V player announces expansion of US operation
(Tuesday, October 12, 2021)
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Green Hills Software Expands INTEGRITY Support to Include RISC-V Architecture
(Wednesday, October 6, 2021)
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Intel backs RISC-V for Nios FPGA processor
(Wednesday, October 6, 2021)
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Codasip Announces UK Hiring for RISC-V Development
(Monday, October 4, 2021)
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Bluespec, Inc. Releases Ultra-Low Footprint RISC-V Processor Family for Xilinx FPGAs, Offers Free Quick-Start Evaluation.
(Monday, September 27, 2021)
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6,000 RISC-V Cores on a Xilinx FPGA Break the CoreScore World Record
(Monday, September 27, 2021)
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EPI EPAC1.0 RISC-V Test Chip Samples Delivered
(Tuesday, September 21, 2021)
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RISC-V to Shake Up $8.6B Semiconductor IP Market
(Monday, September 20, 2021)
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RISC-V Launches the Open Hardware Diversity Alliance
(Sunday, September 19, 2021)
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Synopsys Accelerates Most Stringent Functional Safety Certification of NSITEXE RISC-V Parallel Processor IP
(Monday, September 13, 2021)
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Andes Technology Corp. Brings Its Broad Family of RISC-V CPU IP to the Silicon Catalyst Semiconductor Incubator
(Tuesday, September 7, 2021)
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Nvidia CUDA Software Gets Ported to Open-Source RISC-V GPGPU Project
(Monday, September 6, 2021)
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Apple exploring open-source RISC-V chips, but almost certainly not instead of ARM
(Thursday, September 2, 2021)
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Semiconductor veterans gather to design customizable, chiplet-based RISC-V server processors
(Tuesday, August 31, 2021)
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Haawking licenses SEGGER's emRun for RISC-V
(Monday, August 30, 2021)
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Imagination Technologies to design RISC-V cores
(Friday, August 27, 2021)
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Esperanto Technologies Unveils Energy-Efficient RISC-V-Based Machine Learning Accelerator Chip
(Tuesday, August 24, 2021)
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Andes Technology and Cyberon Collaborate to Provide Edge-Computing Voice Recognition Solution on DSP-capable RISC-V Processors
(Wednesday, August 18, 2021)
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Edge-computing voice recognition on DSP-capable RISC-V processors
(Wednesday, August 18, 2021)
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