RISC-V can be implemented on ASICs and FPGAs, but what about the open-source software development tools?
www.designnews.com, Nov. 06, 2020 –
Lately, news about the free and open RISC-V Instruction Set Architecture (ISA) has been garnishing a lot of attention. One reason is that RISC-V might become a less expensive yet viable competitor to the global processor leader Arm, especially if the latter is acquired by GPU-giant Nvidia.
Even before the potential announcement of Arm by Nvidia, the RISC-V platform had gained a large following among system-on-chip (SoC) designers, thanks in part to its standardized development platform and diverse ecosystem.
RISC-V is a processing architecture, but not a processor implementation. This removes the bias toward a particular microarchitecture or silicon technology. RISC-V is a free, open-source ISA that is based on reduced instruction set computer (RISC) principles. That's why it's hardware processor agnostic. RISC-V can be implemented in an ASIC or FPGA, and on any process node.