Imperas has extended its Risc-V reference model and simulator to cover forthcoming vector instructions and to support coverage-driven verification analysis.
www.electronicsweekly.com, Oct. 19, 2020 –
Called riscvOVPsim, the enhanced version including a vector test suite is freely available for commercial use from Open Virtual Platforms, and a base version is available free from GitHub.
"The upcoming ratification of the Risc-V vector instruction extension offers system designers flexibility to configure vector engines to support complex arithmetic operations required for applications involving linear algebra, such high-performance computing, AI and machine learning applications," according to the company. "With these latest enhancements to riscvOVPsim, software developers and system architects can start to explore Risc-V based solutions, while design verification engineers can configure the models for test benches and test frameworks with coverage analysis."