soiconsortium.org, Jun. 26, 2020 –
FD-SOI is receiving significant traction with analog designers, but analog IP reuse often equates to tough choices. Porting chips from bulk to FD-SOI or creating new chips on FD-SOI means making decisions on porting existing bulk IP or starting from scratch.
To invest the time and resources in reusing an analog IP requires a judgement call on the potential returns from the market and the time it takes to get the IP to that market to generate revenue is key – if a competitor's project hits the market first, then the potential returns are greatly diminished. There is also a need to understand the differences in process technologies and the impact those differences have on the efficient reuse of analog IPs. All this means that the demands on resources and time are high.