SiFive has announced hardware trace and debug for RISC-V processor IP.
electronicsweekly.com, Mar. 18, 2020 –
Called SiFive Insight, it is "industry's first combined trace and debug solution for the freely-available, open-specification RISC-V ISA", said SiFive. it is intended to "meet customer demand and expectations for the capability to access, observe, and control products deploying SiFive's RISC-V Core IP portfolio".
UltraSoC CEO Rupert Baines expressed surprise at the claim: "I'm amused to see SiFive claim 'industry's first trace and debug solution for RISC-V ISA'. There was I thinking that UltraSoC had been shipping trace & debug for RISC-V for at least two years, silicon proven in multiple customers, including many SiFive customers," said Baines, "but what do I know?"