www.tsmc.com, Nov. 27, 2019 –
Tokyo, Japan, and Hsinchu, Taiwan, R.O.C.- The University of Tokyo and TSMC today announced an alliance to pursue organization-wide collaboration in leading-edge semiconductor technology. Under the alliance, TSMC will provide its CyberShuttle® multi-project wafer prototyping service to the Systems Design Lab, or d.lab, of the Graduate School of Engineering at the University of Tokyo. The d.lab will also adopt TSMC’s Open Innovation Platform® Virtual Design Environment (VDE) for their chip design process. In addition, University of Tokyo researchers and TSMC R&D personnel are building a platform for direct collaboration to jointly research semiconductor technologies for the future of computing.
The University of Tokyo d.lab, newly launched in October 2019, is a research organization where industry and academia collaborate on the design of specialized, application-specific chips to support a knowledge-intensive society of the future. While d.lab serves as a design hub, the University of Tokyo-TSMC alliance serves as a gateway to turn d.lab’s diverse designs into functioning chips. For the innovators at d.lab, TSMC’s VDE provides a secure and flexible cloud-based design environment supported by TSMC’s comprehensive design infrastructure, while the CyberShuttle® service greatly lowers the barriers to obtaining prototype chips manufactured using the semiconductor industry’s most advanced process technologies.