Design & Reuse

64-bit multi-cluster CPU IP is ISO 26262 & IEC 61508 compliant

Jun. 12, 2018 – 

Designed for safety critical systems in autonomous vehicles, MIPS' I6500-F CPU IP core is claimed to be the first high performance 64-bit multi-cluster CPU IP to receive formal certification of compliance for ASIL B [D], based on ISO 26262: 1st edition 2011 (&DIS 2nd Edition 2018) and IEC 61508 SIL 2.

The core was certified by Resiltech, a leader in certification of safety-related products for automotive and industrial applications.
"Unlike 'ASIL B/D ready' solutions, the MIPS I6500-F has been developed as a SEooC, based on ASIL B [D] decomposition, for items targeting ASIL D automotive applications and delivers both safety and performance, an essential combination for extremely high system efficiency, scalable computing and compute-intensive tasks," explains David Lau, MIPS' Vice President of Engineering.

"The I6500-F is one of a new class of MIPS CPUs designed to 'FortifAI' next-generation intelligent applications. This ASIL B (D) SEooCs certification helps our customers significantly de-risk and accelerate certification at the SoC level."

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