www.embedded.com, Oct. 14, 2024 –
Lauterbach and Kernkonzept, as the industry's first suppliers, empower architects of virtualized software systems to commence development and testing on forthcoming RISC-V platforms before the availability of equivalent System-on-Chips (SoCs) in silicon.
To implement mixed-critical workloads with varying security requirements on a high-performance CPU, robust isolation, including the corresponding operating systems, is necessary. Developers can virtualize the underlying hardware using a hypervisor, allowing workloads with varying safety levels to be executed in isolated Virtual Machines (VMs).
A software architecture for Software Defined Vehicles (SDV) integrates cloud technology with automotive functional safety and real-time requirements, necessitating the use of virtualization. Prominent semiconductor manufacturers throughout the automotive value chain have pledged allegiance to RISC-V; nevertheless, the associated SoCs that will provide virtualization on RISC-V CPUs remain in the developmental phase.
Kernkonzept and Lauterbach provide developers the option to produce suitable software immediately by facilitating the development, debugging, and testing of RISC-V software for virtualized software architectures on the renowned emulation platform QEMU for the first time.
The advanced and established L4Re Hypervisor of this Kernkonzept operates on the Generic RISC-V Virtual Platform executed in QEMU, while Lauterbach's TRACE32® debugging and tracing tools facilitate the examination of the complete software stack, encompassing the L4Re Hypervisor and all virtual machines (VMs) along with their diverse operating systems and applications.
Consequently, developers of virtualized software architectures and applications operating on diverse, advanced, and real-time operating systems can commence their development efforts promptly, before the delivery of the relevant RISC-V chips in silicon form.
Kernkonzept's L4Re Hypervisor effectively isolates real-time workloads, even on diminutive devices. The streamlined codebase in privileged mode, along with its comprehensive capabilities for seamlessly integrating security and safety functions into the system, renders the L4Re Hypervisor family optimal for certification-requisite products.
Utilizing these characteristics substantially mitigates risk in the certification process, concurrently conserving time and resources. This renders it an ideal application for the automobile sector, avionics, or the Internet of Things. Kernkonzept may enhance system integrity and offer advanced security software to more customers by integrating the open-source software L4Re with the open architecture RISC-V.
TRACE32® lets you examine both the CPU and other cores in silicon or emulated SoC at the same time, which is a unique feature that covers the whole system. On virtualized systems, TRACE32® Hypervisor-aware debugging lets you do OS-aware debugging at the same time for each guest OS or virtual machine (VM) and see a big picture of the whole system. Developers can get to the hypervisor and OS structures and data using TRACE32® tools to learn more about how they work and how they use chip resources.