X-Silicon aims to address the current limitations of edge computing with its new low-power "C-GPU" architecture.
www.allaboutcircuits.com/, May. 15, 2024 –
San Diego-based startup X-Silicon recently announced a novel RISC-V architecture that combines CPU, GPU, and NPU into a single core. The new NanoTile architecture is described as a low-power "C-GPU," aggregating RISC-V Vector CPU capabilities with GPU and AI/ML acceleration in a unique monolithic processor design.
X-Silicon claims Nanotile is the first open-source architecture of its kind. It provides register-level access through a Hardware Abstraction Layer (HAL), which permits OEMs and content providers to customize their drivers and applications for wide hardware adaptability.
Beneath the NanoTile Architecture
The key to this architecture is its multi-core design, where multiple C-GPU cores are arrayed across a chip and linked via an on-chip fast compositor fabric. This setup dynamically aggregates outputs from each core into a common buffer, enhancing data handling for graphics, video processing, and AI tasks. Computational RAM (C-RAM) sits close to the processing cores and unified memory architectures, significantly decreasing latency and boosting overall compute efficiency.
X-Silicon says that its technology can address the limitations faced by existing GPUs. GPUs initially designed for gaming are now struggling with new, diverse workloads like AI and parallel computing. Conventional GPU architectures often suffer from inefficiencies due to fixed-function processing units and underutilization in non-gaming applications.
In contrast, X-Silicon's C-GPU aims to optimize performance for a broader range of applications by employing a scalable, tile-based approach that efficiently renders and manages computing.