51 95.0

Secure-IC's Securyzr™ Tunable Public Key Cryptographic (RSA, ECDSA, SM2, Diffie-Hellman) accelerator - optional SCA protection RSA is a public-key cryptosystem (the encryption key is public when the decryption key is private) widely used for secure data transmission. This IP...

52 95.0

Secure-IC's Securyzr™ Tunable Hash (SHA1-SHA2) Hardware accelerator The Secure Hash Algorithm (SHA) is a family of cryptographic hash function. This family includes SHA-0, SHA-1, SHA-2 and SHA-3. The SHA IP is focused ...

53 94.0

Secure-IC's Securyzr™ Active Shield: Protection against tampering Attack for all foundries processes Attacks on digital circuits can occur when an attacker attempts to physically alter the device's internal components. These types of attacks are known...

54 90.0

MACsec software toolkit INSIDE Secure provides a complete MACsec solution to secure Ethernet through its MACsec software toolkit and family of SafeXcel Hardware IP MACsec Sec...

55 85.0

Secure-IC's Securyzr™ Tunable AES (ECB, CBC, CTR, XTS, CCM, GCM) accelerator - optional SCA protection The Advanced Encryption Standard (AES) is a specification for the encryption of electronic data established by the U.S National Institute of Standards...

56 85.0

Secure-IC's Securyzr™ High-performance AES-GCM accelerator - optional SCA protection The Advanced Encryption Standard (AES) is a specification for the encryption of electronic data established by the U.S National Institute of Standards...

57 85.0

Secure-IC's Securyzr™ High-performance AES-XTS accelerator - optional SCA protection The Advanced Encryption Standard (AES) is a specification for the encryption of electronic data established by the U.S National Institute of Standards...

58 85.0

Secure-IC's Securyzr™ Tunable DES - Triple DES (ECB, CBC, CTR) accelerator - optional SCA protection The Data Encryption Standard (DES) is defined in FIPS PUB 46-3 as a symmetric-key algorithm. The triple DES (TDES) is a block cipher that applies the ...

59 85.0

Secure-IC's Securyzr™ HMAC compatible with Securyzr™ hardware Hash accelerators with SCA protections The HMAC hardware module allows performing NIST HMAC algorithms as standardized in the FIPS 198-1. The module is coupled with one of the NIST standard...

60 85.0

Secure-IC's Securyzr™ Tunable Hash (SM3) Hardware accelerator The SM3 hash algorithm is a cryptographic hash function designed by the Chinese Commercial Cryptography Administration Office (CCCAO) in order to prop...

61 85.0

Secure-IC's Securyzr™ Tunable SM4 Hardware accelerator with SCA protections SM4 is a standardized block cipher used in the Chinese National Standard for Wireless LAN WAPI (Wired Authentication and Privacy Infrastructure)....

62 84.0

Secure-IC's Securyzr™ Tunable Hash (SHA3) Hardware accelerator In the beginning of the 2000s, strong progress has been made on hacking NIST standard hash functions, which led to break of the SHA-1 algorithm. This ...

63 70.0

Quantum-Driven Hardware Root-of-Trust - Physical Unclonable Function (PUF) Our patented semiconductor design is the most secure hardware root-of-trust available to create unforgeable device identities and cryptographic keys. ...

64 70.0

Unified Hardware IP for Post-Quantum Cryptography based on Kyber and Dilithium PQSecure™-CRYSTALS from PQSecure Technologies, LLC. is a set of hardware IP cores designed for various target applications of digital signatures and k...

65 70.0

Secure-IC's Securyzr™ Public Key Crypto Engine The Public Key Crypto Engine is a versatile IP core for hardware offloading of all asymmetric cryptographic operations. It enables any SoC, ASIC and F...

66 70.0

Memory (SRAM, DDR, NVM) encryption solution Memory protection against reverse engineering and tampering....

67 53.0

Secure-IC's Securyzr Crypto Coprocessor with integrated Post-Quantum Cryptography IPs The Crypto Coprocessors are a hardware IP core platform that accelerates cryptographic operations in System-on-Chip (SoC) environment on FPGA or ASIC....

68 51.0

TLS 1.3 - Security Protocol Transport Layer Security (TLS) is a cryptographic protocol used for building a secure connection between a client and a server over the Internet. A ha...

69 51.0

True Random Number Generator (TRNG) The TRNG IP core establishes a benchmark for hardware-based security in cryptographic systems, by generating high-entropy, true random numbers essenti...

70 50.0

Secure-IC's Securyzr(TM) TLS Handshake Hardware Accelerator The TLS handshake hardware accelerator is a secure connection engine that can be used to offload the compute intensive Public Key operations (Diffie-H...

71 50.0

Securyzr Digital True Random Number Generator (TRNG) by Secure-IC, compliant with NIST SP800-90 Secure-IC offers both True Random Number Generator (TRNG) resilient to harmonic injection for statistically independent sets of bits generation and De...

72 49.0

Secure-IC's Securyzr(TM) AES-GCM Multi-Booster The AES-GCM Multi-Booster crypto engine is a scalable implementation of the AES-GCM algorithm compliant with the NIST SP 800-38D standard. The unique ...

73 49.0

Secure-IC's Securyzr(TM) True Random Number Generator The True Random Number Generator is an essential silicon-proven digital IP core for all FPGA, ASIC and SoC designs that targets cryptographically secu...

74 49.0

Root of Trust eSecure module for SoC security The eSecure IP is a single subsystem for SoC/ASIC/FPGA to address key security challenges, playing the role of root-of-trust. The module is highly fle...

75 48.0

nQrux® Crypto Module Xiphera’s nQrux® Crypto Module IP core provides a comprehensive security platform that allows for customisation of top-notch cryptographic services, s...

76 46.0

CRYSTALS-Dilithium - Post-Quantum Digital Signature IP Core Post-quantum CRYSTALS-Dilithium Digital Signature IP Core from ResQuant supports key generation, signing and signature verification operations for II,...

77 46.0

Post-Quantum Cryptographic Processor The Post-Quantum Cryptographic Processor is a novel solution for future world with threats coming from quantum computers breaking current public key a...

78 46.0

Cryptography Accelerator FPGA IP core implementation of a various cryptographic algorithms, including new, post-quantum standards, available as customizable cryptographic acce...

79 46.0

CRYSTALS-Dilithium - Post-Quantum Digital Signature IP Core Post-quantum CRYSTALS-Dilithium Digital Signature IP Core from ResQuant supports key generation, signing and signature verification operations for II,...

80 46.0

Post-Quantum Cryptographic Processor The Post-Quantum Cryptographic Processor is a novel solution for future world with threats coming from quantum computers breaking current public key a...

81 45.0

Secure-IC's Securyzr(TM) AES-GCM Ultra-Low Latency The AES-GCM Ultra-low latency crypto engine is targeted for CXL link encryption with an implementation of the AES-GCM algorithm compliant with the NIS...

82 45.0

AES-GCM Authenticated Encrypt/Decrypt Core The AES-GCM encryption IP core implements Rijndael encoding and decoding in compliance with the NIST Advanced Encryption Standard. It processes 128-bi...

83 45.0

Secure-IC's Securyzr(TM) AES-GCM Ultra-Low Latency The AES-GCM Ultra-low latency crypto engine is targeted for CXL link encryption with an implementation of the AES-GCM algorithm compliant with the NIS...

84 43.0

Elliptic Curve Cryptography (ECC) Accelerator The high-speed ECC Accelerator reaches to more than a thousand operations per second in a modern FPGA or ASIC. Furthermore, it covers all NIST P curve...

85 40.5882

PUFenc - PUF-based Crypto Engine In cryptography, encryption is the process of encoding a message or information in such a way that only authorized parties can access it. The informat...

86 40.5882

PUFtrng - PUF-based True Random Number Generator A random number generator (RNG) is an essential function for security solutions. The security strength of many systems and applications depends on a h...

87 40.5882

PUFuid - PUF-based Unique Identity Unique identity (UID) is an identifier that is generally stored on each chip. With this UID, chips can generate an internal secret as a seed for key g...

88 40.0

UFS 3.0 Host Controller with AES Encryption compatible with M-PHY 4.0 and UniPro 1.8 Arasan's Universal Flash Storage 3.0 (UFS 3.0) is a simple but high performance, serial interface primarily used in mobile systems, between host proce...

89 40.0

Secure-IC's Securyzr(TM) Crypto Coprocessor (Compact) The Crypto Coprocessors are a hardware IP core platform that accelerates cryptographic operations in System-on-Chip (SoC) environment on FPGA or ASIC....

90 40.0

Secure-IC's Securyzr(TM) Crypto Coprocessor (Premium) The Crypto Coprocessors are a hardware IP core platform that accelerates cryptographic operations in System-on-Chip (SoC) environment on FPGA or ASIC....

91 40.0

Secure-IC's Securyzr(TM) Crypto Coprocessor (Standard) The Crypto Coprocessors are a hardware IP core platform that accelerates cryptographic operations in System-on-Chip (SoC) environment on FPGA or ASIC....

92 40.0

Secure-IC's Securyzr™ IPsec Engine The IPsec Engine implements RFC4301 and other relevant RFCs, providing confidentiality, connectionless data integrity, data-origin authentication and ...

93 40.0

On-chip Security Enclave - Digital IP delivered as RTL Kudelski IoT Secure Hardware IP has been designed for chipset manufacturers seeking key protection in their system on chip (SoC/ASIC) solutions, robus...

94 38.0

100G AES Encryption Core The 100G AES Encryption Core is a high performance and yet low footprint AES engine for 100G/s application. Typical applications are providing bulk en...

95 38.0

10G/25G/40G/50G AES Encryption Core The 10G/25G/40G/50G AES Encryption Core is a high performance and yet low footprint AES engine for 10G/s – 50G/s application. Typical applications are...

96 38.0

400G AES Encryption Core The 400G AES Encryption Core is a high performance and yet low footprint AES engine for 400G/s application. Typical applications are providing bulk en...

97 38.0

Sub-2.5G AES Encryption Core The sub-2.5G AES Encryption Core is a special low footprint and low-power implementation of AES engine for application requiring less than 2.5G/s. Bec...

98 38.0

Secure-IC's Securyzr™ 1.5Tbps MACsec Engine The MACsec Engine implements the latest IEEE 802.1AE specification, providing connectionless data integrity, data origin authenticity and confidential...

99 30.0

Secure-IC's Securyzr(TM) Network Security Crypto Accelerator To answer the needs of high-performance systems, a new generation of powerful processors is being designed and deployed. These multi-core SoCs contain...

100 30.0

DPA- and FIA-resistant Ultra Low Power FortiCrypt AES IP core Intro The AES ULP-DPA-FIA IP core belongs to the FortiCrypt product family. This protected AES IP core provides an extraordinary AES throughput per wa...