1 95.0

Secure-IC's Securyzr™ Tunable Public Key Cryptographic (RSA, ECDSA, SM2, Diffie-Hellman) accelerator - optional SCA protection RSA is a public-key cryptosystem (the encryption key is public when the decryption key is private) widely used for secure data transmission. This IP...

2 95.0

Secure-IC's Securyzr™ Tunable Hash (SHA1-SHA2) Hardware accelerator The Secure Hash Algorithm (SHA) is a family of cryptographic hash function. This family includes SHA-0, SHA-1, SHA-2 and SHA-3. The SHA IP is focused ...

3 85.0

Secure-IC's Securyzr™ Tunable AES (ECB, CBC, CTR, XTS, CCM, GCM) accelerator - optional SCA protection The Advanced Encryption Standard (AES) is a specification for the encryption of electronic data established by the U.S National Institute of Standards...

4 85.0

Secure-IC's Securyzr™ High-performance AES-GCM accelerator - optional SCA protection The Advanced Encryption Standard (AES) is a specification for the encryption of electronic data established by the U.S National Institute of Standards...

5 85.0

Secure-IC's Securyzr™ High-performance AES-XTS accelerator - optional SCA protection The Advanced Encryption Standard (AES) is a specification for the encryption of electronic data established by the U.S National Institute of Standards...

6 85.0

Secure-IC's Securyzr™ Tunable DES - Triple DES (ECB, CBC, CTR) accelerator - optional SCA protection The Data Encryption Standard (DES) is defined in FIPS PUB 46-3 as a symmetric-key algorithm. The triple DES (TDES) is a block cipher that applies the ...

7 85.0

Secure-IC's Securyzr™ HMAC compatible with Securyzr™ hardware Hash accelerators with SCA protections The HMAC hardware module allows performing NIST HMAC algorithms as standardized in the FIPS 198-1. The module is coupled with one of the NIST standard...

8 85.0

Secure-IC's Securyzr™ Tunable Hash (SM3) Hardware accelerator The SM3 hash algorithm is a cryptographic hash function designed by the Chinese Commercial Cryptography Administration Office (CCCAO) in order to prop...

9 85.0

Secure-IC's Securyzr™ Tunable SM4 Hardware accelerator with SCA protections SM4 is a standardized block cipher used in the Chinese National Standard for Wireless LAN WAPI (Wired Authentication and Privacy Infrastructure)....

10 84.0

Secure-IC's Securyzr™ Tunable Hash (SHA3) Hardware accelerator In the beginning of the 2000s, strong progress has been made on hacking NIST standard hash functions, which led to break of the SHA-1 algorithm. This ...

11 50.0

Securyzr Digital True Random Number Generator (TRNG) by Secure-IC, compliant with NIST SP800-90 Secure-IC offers both True Random Number Generator (TRNG) resilient to harmonic injection for statistically independent sets of bits generation and De...

12 45.0

AES-GCM Authenticated Encrypt/Decrypt Core The AES-GCM encryption IP core implements Rijndael encoding and decoding in compliance with the NIST Advanced Encryption Standard. It processes 128-bi...

13 38.0

10G/25G/40G/50G AES Encryption Core The 10G/25G/40G/50G AES Encryption Core is a high performance and yet low footprint AES engine for 10G/s – 50G/s application. Typical applications are...

14 38.0

400G AES Encryption Core The 400G AES Encryption Core is a high performance and yet low footprint AES engine for 400G/s application. Typical applications are providing bulk en...

15 38.0

Sub-2.5G AES Encryption Core The sub-2.5G AES Encryption Core is a special low footprint and low-power implementation of AES engine for application requiring less than 2.5G/s. Bec...

16 20.0

AES-XTS encryption/decryption IP SphinX is designed to accommodate the speed, latency and throughput requirements of high performance computer systems main memory / DRAM. The IP imple...

17 20.0

Multipurpose Security Protocol Accelerator Complex system-on-chip (SoC) requirements can include security at the MAC layer, VPN layer, and application layer. The SynopsysSecurity Protocol Accel...

18 12.0

AES-XTS for Storage Encrypt/Decrypt Core The AES-XTS encryption IP core implements encryption/decryption for sector-based storage data. It uses the AES block cypher, in compliance with the NI...

19 10.0

128-bit Public Key Accelerator Public key cryptography requires complex mathematical operations on very large numbers (from 160 to 4096 bits, or more). The majority of embedded CPUs...

20 10.0

32-bit Public Key Accelerator Public key cryptography requires complex mathematical operations on very large numbers (from 160 to 4096 bits, or more). The majority of embedded CPUs...

21 10.0

Security Protocol Accelerator for SM3 and SM4 SM3 and SM4 are commercial cryptographic standards issued and regulated by the Chinese Office of State Commercial Cryptography Administration (OSCCA)...

22 10.0

True Random Number Generator for NIST SP 800-90c The security strength of many systems and applications is dependent on the quality of random number generators. Many cryptographic operations require ...

23 10.0

Ultra High-Performance AES-GCM/CTR IP The proliferation and expansion of connected devices, connectivity infrastructure, cloud computing, and artificial intelligence is driving for increas...

24 10.0

Ultra High Performance AES-XTS/ECB Core The proliferation and expansion of connected devices, connectivity infrastructure, cloud computing, and artificial intelligence is driving for increas...

25 5.0

SHA-384 and SHA-512 Secure Hash Crypto Engine The SHA-384/512 is a high-throughput, and compact hardware implementation of the SHA-384 and the SHA-512 cryptographic hash functions provisioned by t...

26 5.0

True Random Number Generator (TRNG) Analog Noise Source based on a robust state-of-the-art physical entropy source The True Random Number Generator (TRNG) Analog Noise Source is a physical entropy source compliant with the AIS 31 standard....

27 5.0

DES and Triple DES (TDES or 3DES) encryption and decryption coprocessor The Triple DES Coprocessor is a Data Encryption Standard (FIPS 46-3) peripheral computing DES and Triple DES (TDES and 3DES) encryption and decryption...

28 4.0

AES 256 encryption IP core Logic Fruit’s AES 256 encryption IP core implements Rijndael encoding and decoding. It works with 256-bit blocks and is programmed to work with 256-bi...

29 4.0

NIST FIPS-197 Compliant Ultra-Low Power AES IP Core ntAES8 core implements NIST FIPS-197 Advanced Encryption Standard. ntAES8 core can be programmed to encrypt or decrypt 128-bit blocks of data using a ...

30 3.0

Advanced Encryption Standard (AES) core The AES / Rijndael core can handle input block sizes of 128, 192 or 256 bit. The Decoder needs the key and the cipher text as input. The start_de sign...

31 2.0

GCM-AES Authenticated Encryption & Decryption The AES-GCM128 core from Alma Technologies implements the GCM-AES authenticated encryption and decryption, as specified in the NIST SP800-38D recommen...

32 1.0

AES Encryption & Decryption with Fixed Block-Cipher Mode The AES-C core from Alma Technologies implements the FIPS-197 Advanced Encryption Standard. It can be programmed to encrypt or decrypt 128-bit blocks ...

33 1.0

enhanced AES FIPS-197 Compliant. Encrypt and decrypt modules with 128, 192 and 256 bit keys. Various versions are available, from small area to high performance, u...

34 1.0

Enhanced AES with CCM mode FIPS-197 Compliant. Encrypt and decrypt modules with 128, 192 and 256 bit keys. Various versions are available, from small area to high performance, u...

35 0.0

Secure-IC's Securyzr™ ARIA Crypto Engine The ARIA crypto engine includes a generic implementation of the ARIA algorithm which is the block cipher standard of South Korea. It is compliant w...

36 0.0

MD5 Message-Digest Algorithm The MD5 core from Alma Technologies is a high-performance implementation of the MD5 Message-Digest algorithm, a one-way hash function, compliant to th...

37 0.0

SHA-1 Secure Hash Function The SHA1 core from Alma Technologies is a high performance implementation of the SHA-1 (Secure Hash Algorithm 1) one-way cryptographic hash function, ...

38 0.0

AES Encrypt/Decrypt Core The AES encryption IP core implements Rijndael encoding and decoding in compliance with the NIST Advanced Encryption Standard. It processes 128-bit bl...

39 0.0

Processor Core The MD5 encryption IP core is a fully compliant hardware implementation of the Message Digest Algorithm MD5, suitable for a variety of applications. ...

40 0.0

SNOW-V Stream Cipher Engine The SNOW-V IP core implements the SNOW-V stream cipher mechanism, aiming to meet the security demands of modern high-speed communication systems. It c...

41 0.0

AES-ECB-CBC-CFB-CTR 1 Billion Trace DPA Resistant Crypto Accelerator Rambus DPA Resistant AES-FBC Cryptographic Accelerator Cores offload compute intensive cryptographic algorithms in SoC’s CPU at 100x performance (when...

42 0.0

Multipurpose Security Protocol Accelerator, ASIL B compliant Complex system-on-chip (SoC) requirements can include security at the MAC layer, VPN layer, and application layer. The SynopsysSecurity Protocol Accel...

43 0.0

Synopsys PUF Hardware Premium with key wrap and certification support Device identities and cryptographic root keys are at the foundation of every security system. With the explosion of the IoT, new and scalable ways are...

44 0.0

Synopsys PUF Hardware Base IP Device identities and cryptographic root keys are at the foundation of every security system. With the explosion of the IoT, new and scalable ways are...

45 0.0

ASIL-B Ready PUF Hardware Base Anything that is connected to the internet is at risk, and connected vehicles are no exception. Every connected electronic component represents a pote...

46 0.0

ASIL-B Ready PUF Hardware Premium with key wrap and certification support Anything that is connected to the internet is at risk, and connected vehicles are no exception. Every connected electronic component represents a pote...

47 0.0

PUF FPGA-Xilinx Base FPGAs are widely used in mission-critical environments with specific processing needs. Motivations for copying or altering sensitive data or valuable ...

48 0.0

PUF FPGA-Xilinx Premium with key wrap FPGAs are widely used in mission-critical environments with specific processing needs. Motivations for copying or altering sensitive data or valuable ...

49 0.0

Agile ECC/RSA Public Key Accelerator with 128-bit ALU Public key cryptography requires complex mathematical operations on very large numbers (from 160 to 4096 bits, or more). The majority of embedded CPUs...

50 0.0

Agile ECC/RSA Public Key Accelerator with 32-bit ALU Public key cryptography requires complex mathematical operations on very large numbers (from 160 to 4096 bits, or more). The majority of embedded CPUs...